DocumentCode
1119401
Title
Hot-electron trapping in thin LPCVD SiO2 dielectrics
Author
Kawamoto, Galen H. ; Magyar, Gregory R. ; Yau, Leopoldo D.
Author_Institution
Intel Corporation, Hillsboro, OR
Volume
34
Issue
12
fYear
1987
fDate
12/1/1987 12:00:00 AM
Firstpage
2450
Lastpage
2455
Abstract
The electron-trapping and surface-state generation characteristics of thin LPCVD SiO2 dielectrics have been studied using avalanche hot-electron injection. Layered structures of thermal and LPCVD oxide have been examined as a function of anneal time and temperature. After a 1000°C anneal, bulk trapping in the LPCVD oxide was reduced to levels comparable to those in a high-quality dry thermal oxide. Sensitivity to remaining traps was reduced by the presence of a thermal oxide layer on the semiconductor surface. After a post-deposition anneal (PDA), these layered surfaces demonstrated hot-electron performance equal to that of thermal oxide within measurable limits. Also, layered structures generally demonstrated better resistance to surface-state generation than thermal oxides alone. Since less chlorine is incorporated into the layered structures during fabrication, this result is consistent with a recent model identifying broken chlorine bonds as the origin of surface states.
Keywords
Annealing; Character generation; Dielectrics; Electrical resistance measurement; Electron traps; Fabrication; Secondary generated hot electron injection; Surface resistance; Temperature sensors; Thermal resistance;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/T-ED.1987.23334
Filename
1487045
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