• DocumentCode
    1119564
  • Title

    Comments on "GaAs FET device and circuit simulation in SPICE"

  • Author

    Divekar, D.

  • Author_Institution
    Valid Logic Systems, San Jose, CA
  • Volume
    34
  • Issue
    12
  • fYear
    1987
  • Firstpage
    2564
  • Lastpage
    2565
  • Abstract
    The capacitance model proposed in the above paper [1] is implemented in a circuit simulation program. Some of the difficulties associated with this implementation are addressed and illustrated with the help of a circuit example.
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/T-ED.1987.23352
  • Filename
    1487063
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1119564