DocumentCode
1119936
Title
A Build-in Self-Test Technique for RF Low-Noise Amplifiers
Author
Huang, Yen-Chih ; Hsieh, Hsieh-Hung ; Lu, Liang-Hung
Author_Institution
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei
Volume
56
Issue
5
fYear
2008
fDate
5/1/2008 12:00:00 AM
Firstpage
1035
Lastpage
1042
Abstract
A built-in self-test (BIST) technique suitable for RF low-noise amplifiers (LNAs) is presented in this paper. With fully integrated amplitude detectors and logarithmic amplifiers, the BIST module can be employed as a generic platform for gain extraction of the device-under-test (DUT) without expensive testing instruments, while maintaining a reasonable hardware overhead and minimum loading effects to the DUT. Using a 0.18-mum CMOS process, a 5-GHz variable-gain LNA with the proposed BIST module is implemented. Based on the experimental results, on-chip gain extraction of the LNA has been demonstrated with an error less than 1 dB for various gain modes. The additional chip area required for the BIST functionality measures 0.042 mm2, which is considerably small compared with the physical size of the RF amplifiers.
Keywords
CMOS integrated circuits; built-in self test; detector circuits; integrated circuit testing; low noise amplifiers; microwave amplifiers; BIST technique; CMOS process; RF low-noise amplifiers; build-in self-test technique; device-under-test; frequency 5 GHz; fully integrated amplitude detectors; logarithmic amplifiers; on-chip gain extraction; size 0.18 mum; Amplitude detectors; RF testing; built-in self-test (BIST); logarithmic amplifiers; low-noise amplifiers (LNAs);
fLanguage
English
Journal_Title
Microwave Theory and Techniques, IEEE Transactions on
Publisher
ieee
ISSN
0018-9480
Type
jour
DOI
10.1109/TMTT.2008.921293
Filename
4481361
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