DocumentCode
1120316
Title
A novel trench-isolated buried N+FAMOS Transistor suitable for high-density EPROM´s
Author
Esquivel, Agerico L. ; Mitchell, Allan T. ; Paterson, J.L. ; Douglas, M. ; Tigelaar, H.L. ; Riemenschneider, Bert R. ; Coffman, Tim M. ; Gill, M. ; Lahiry, R. ; McElroy, D. ; Shah, P.
Author_Institution
Texas Instruments Incorporated, Dallas, TX
Volume
8
Issue
4
fYear
1987
fDate
4/1/1987 12:00:00 AM
Firstpage
146
Lastpage
147
Abstract
This paper describes an innovative use of trench isolation to achieve high programmability and improved isolation in a high-density electrically programmable read-only memory (EPROM) cell. This cell, with a 13.5-µm2area at 1.5-µm design rules, was fabricated by using a novel cross-point structure with buried N+ (BN+) bit lines as source and drain of the floating-gate avalanche injection MOS (FAMOS) transistor. Programming efficiency and bit-line isolation were enhanced by a novel positioning of the trench isolation between bit-lines and between the double-polysilicon FAMOS transistors. Trench isolation should permit scaling of the bit-line spacing to below 1 µm.
Keywords
Current measurement; Diodes; Double-gate FETs; Electric breakdown; Leakage current; Resistors; Silicon; Space vector pulse width modulation; Testing; Threshold voltage;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/EDL.1987.26582
Filename
1487132
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