• DocumentCode
    1121052
  • Title

    Hot-carrier-induced MOSFET degradation under AC stress

  • Author

    Choi, J.Y. ; Ko, P.K. ; Hu, Chenming

  • Author_Institution
    University of California, Berkeley, CA
  • Volume
    8
  • Issue
    8
  • fYear
    1987
  • fDate
    8/1/1987 12:00:00 AM
  • Firstpage
    333
  • Lastpage
    335
  • Abstract
    The effects of gate and drain voltage waveforms on the hot-carrier-induced MOSFET degradation are studied. Drain votage transients have little effect on the degradation rate. Only the falling edge of the gate pulse in the presence of a high drain voltage enhances the degradation rate. For devices in typical inverter circuits, dc stress results together with the substrate current waveform can predict the degradation rate under ac stress for a wide range of rise and delay times.
  • Keywords
    Circuit testing; Degradation; Electron traps; Hot carriers; Inverters; Life testing; MOSFET circuits; Propagation delay; Stress; Voltage;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/EDL.1987.26650
  • Filename
    1487200