DocumentCode :
1121397
Title :
Parallel Parsing Algorithms and VLSI Implementations for Syntactic Pattern Recognition
Author :
Chiang, Y.T. ; Fu, K.S.
Author_Institution :
School of Electrical Engineering, Purdue University, West Lafayette, IN 47907; Department of Electrical and Computer Engineering, Washington State University, Pullman, WA 99163.
Issue :
3
fYear :
1984
fDate :
5/1/1984 12:00:00 AM
Firstpage :
302
Lastpage :
314
Abstract :
Earley´s algorithm has been commonly used for the parsing of general context-free languages and the error-correcting parsing in syntactic pattern recognition. The time complexity for parsing is 0(n3). This paper presents a parallel Earley´s recognition algorithm in terms of an ``X*´´ operator. By restricting the input context-free grammar to be ¿-free, the parallel algorithm can be executed on a triangular-shape VLSI array. This array system has an efficient way of moving data to the right place at the right time. Simulation results show that this system can recognize a string with length n in 2n + 1 system time. We also present a parallel parse-extraction algorithm, a complete parsing algorithm, and an error-correcting recognition algorithm. The parallel complete parsing algorithm has been simulated on a processor array which is similar to the triangular VLSI array. For an input string of length n the processor array will give the correct right-parse at system time 2n + 1 if the string is accepted. The error-correcting recognition algorithm has also been simulated on a triangular VLSI array. This array recognizes an erroneous string of length n in time 2n + 1 and gives the correct error count. These parallel algorithms are especially useful for syntactic pattern recognition.
Keywords :
Algorithm design and analysis; Automata; Delay; Dynamic programming; Error correction; Logic gates; Parallel algorithms; Pattern recognition; Read-write memory; Very large scale integration; Earley´s algorithm; VLSI array; error-correcting recognition; parallel CFL parsing; parallel CFL recognition; parse extracting; parsing matrix; processor array; syntactic pattern recognition;
fLanguage :
English
Journal_Title :
Pattern Analysis and Machine Intelligence, IEEE Transactions on
Publisher :
ieee
ISSN :
0162-8828
Type :
jour
DOI :
10.1109/TPAMI.1984.4767522
Filename :
4767522
Link To Document :
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