DocumentCode
1121669
Title
A high-performance BICMOS Technology with double-polysilicon self-aligned bipolar devices
Author
Rajkanan, Kamal ; Gheewala, Tushar R. ; Diedrick, J.
Author_Institution
Unisys Corporation, Eagan, MN
Volume
8
Issue
11
fYear
1987
fDate
11/1/1987 12:00:00 AM
Firstpage
509
Lastpage
511
Abstract
A high-performance BICMOS technology is described which incorporates 12-GHz double-polysilicon self-aligned bipolar, fully salicided CMOS devices and 1-µm features. This process is applied to a new BICMOS gate design, called transistor feedback logic (TFL), to fabricate a divide-by-16 frequency divider with a maximum operating frequency of 364 MHz. Availability of uncompromised MOS and bipolar transistors allows a free mix of pure CMOS, pure bipolar, or BICMOS gates on the same chip.
Keywords
BiCMOS integrated circuits; Boron; CMOS logic circuits; CMOS technology; Frequency conversion; Logic devices; Logic gates; MOS devices; Process design; Very large scale integration;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/EDL.1987.26711
Filename
1487261
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