A process for fabricating submicron all-refractory Josephson tunnel junction circuits

A process for fabricating submicron Josephson junctions suitable for integration in small- and medium-scale integrated circuits is described. This junction process utilizes a double-layer SiO₂ lift-off process in a cross-type geometry to define Josephson junctions. A photoresist strip with an arbitrary length and a fixed width defines the length of the junction. Its width is defined simultaneously with the metallization strip that crosses the first strip. The double-layer SiO ₂ insures a pinhole-free oxide and yields excellent insulating properties suitable for medium-scale circuit applications. This process is used to fabricate Nb/AlO_x/Nb and NbN/MgO/NbN tunnel junctions as small as 0.5 μm² with figures of merit (V_m) larger than 30 mV. The repeatability of this process and its utility in high-current-density Josephson junction circuits are discussed