• DocumentCode
    1122065
  • Title

    On fault equivalence, fault dominance, and incompletely specified test sets

  • Author

    Pomeranz, Irith ; Reddy, Sudhakar M.

  • Author_Institution
    Sch. of ECE, Purdue Univ., West Lafayette, IN, USA
  • Volume
    24
  • Issue
    8
  • fYear
    2005
  • Firstpage
    1271
  • Lastpage
    1274
  • Abstract
    It is shown that fault equivalence and fault dominance relations defined based on the sets of completely specified test vectors that detect each fault may not hold when incompletely specified test vectors are used together with three-value simulation. Experimental results are presented to demonstrate the extent of this phenomenon. Its effects are discussed in general and in the context of a specific application. Possible solutions are also discussed.
  • Keywords
    circuit simulation; circuit testing; digital simulation; fault simulation; fault dominance; fault equivalence; incompletely specified test sets; test sets; three value simulation; Circuit faults; Circuit testing; Cities and towns; Compaction; Electrical fault detection; Fault detection; Fault diagnosis; Test data compression; Fault dominance; fault equivalence; test compaction; test data compression; three-value simulation;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2005.850822
  • Filename
    1487566