• DocumentCode
    1123305
  • Title

    Laboratory investigation of a distance-protection technique for double circuit lines

  • Author

    Eissa, Moustafa Mohammed ; Malik, O.P.

  • Author_Institution
    Dept. of Electr. Eng., Helwan Univ., Cairo, Egypt
  • Volume
    19
  • Issue
    4
  • fYear
    2004
  • Firstpage
    1629
  • Lastpage
    1635
  • Abstract
    A novel digital distance scheme has been implemented on a 32-bit digital signal processor board. The scheme is tested on a physical model of double circuit lines of equal impedance with a source at each end. Two relays instead of four are proposed for the two lines. Each relay is fed by three voltage and six current signals. The technique is based on the comparison of the measured impedance of the corresponding phases. Tests conducted on the physical model for various faults show that high fault resistance, current in-feed, balance-point location, out-of-step operation, and far-end faults are solved. Moreover, 100% of the line is protected.
  • Keywords
    digital signal processing chips; power engineering computing; power transmission faults; power transmission lines; power transmission protection; relay protection; 32-bit digital signal processor board; balance-point location; current in-feed; digital distance scheme; distance-protection technique; double circuit lines; far-end faults; high fault resistance; laboratory investigation; out-of-step operation; Circuit faults; Circuit testing; Digital relays; Digital signal processors; Electrical resistance measurement; Impedance measurement; Laboratories; Phase measurement; Protection; Voltage; Digital protection; parallel lines; real-time implementation;
  • fLanguage
    English
  • Journal_Title
    Power Delivery, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0885-8977
  • Type

    jour

  • DOI
    10.1109/TPWRD.2004.832399
  • Filename
    1339325