Architecture of a dual-modality, high-resolution, fully digital positron emission tomography/computed tomography (PET/CT) scanner for small animal imaging

Contemporary positron emission tomography (PET) scanners are commonly implemented with very large scale integration analog front-end electronics to reduce power consumption, space, noise, and cost. Analog processing yields excellent results in dedicated applications, but offers little flexibility for sophisticated signal processing or for more accurate measurements with newer, fast scintillation crystals. Design goals of the new Sherbrooke PET/computed tomography (CT) scanner are: 1) to achieve 1 mm resolution in both emission (PET) and transmission (CT) imaging using the same detector channels; 2) to be able to count and discriminate individual X-ray photons in CT mode. These requirements can be better met by sampling the analog signal from each individual detector channel as early as possible, using off-the-shelf, 8-b, 100-MHz, high-speed analog-to-digital converters (ADC) and digital processing in field programmable gate arrays (FPGAs). The core of the processing units consists of Xilinx SpartanIIe that can hold up to 16 individual channels. The initial architecture is designed for 1024 channels, but modularity allows extending the system up to 10 K channels or more. This parallel architecture supports count rates in excess of a million hits/s/scintillator in CT mode and up to 100 K events/s/scintillator in PET mode, with a coincidence time window of less than 10 ns full-width at half-maximum.