• DocumentCode
    112392
  • Title

    Ant Colony Optimization-Based Fault-Aware Routing in Mesh-Based Network-on-Chip Systems

  • Author

    Hsien-Kai Hsin ; En-Jui Chang ; Chia-An Lin ; Wu, An-Yeu Andy

  • Author_Institution
    Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan
  • Volume
    33
  • Issue
    11
  • fYear
    2014
  • fDate
    Nov. 2014
  • Firstpage
    1693
  • Lastpage
    1705
  • Abstract
    The advanced deep submicrometer technology increases the risk of failure for on-chip components. In advanced network-on-chip (NoC) systems, the failure constrains the on-chip bandwidth and network throughput. Fault-tolerant routing algorithms aim to alleviate the impact on performance. However, few works have integrated the congestion-, deadlock-, and fault-awareness information in channel evaluation function to avoid the hotspot around the faulty router. To solve this problem, we propose the ant colony optimization-based fault-aware routing (ACO-FAR) algorithm for load balancing in faulty networks. The behavior of an ant colony while facing an obstacle (failure in NoC) can be described in three steps: 1) encounter; 2) search; and 3) select. We implement the corresponding mechanisms as: 1) notification of fault information; 2) path searching mechanism; and 3) path selecting mechanism. With proposed ACO-FAR, the router can evaluate the available paths and detour packets through a less-congested fault-free path. The simulation results show that this paper has higher throughput than related works by 29.1%-66.5%. In addition, ACO-FAR can reduce the undelivered packet ratio to 0.5%-0.02% and balance the distribution of traffic flow in the faulty network.
  • Keywords
    ant colony optimisation; circuit optimisation; fault diagnosis; network routing; network-on-chip; resource allocation; search problems; ACO-FAR algorithm; NoC systems; advanced deep submicrometer technology; ant colony optimization-based fault-aware routing algorithm; channel evaluation function; congestion information; deadlock information; detour packets; fault-awareness information; fault-tolerant routing algorithms; less-congested fault-free path; load balancing; mesh-based network-on-chip systems; network throughput; on-chip bandwidth; on-chip components; path searching mechanism; path selecting mechanism; traffic flow distribution; undelivered packet ratio reduction; Circuit faults; Fault detection; Fault tolerance; Fault tolerant systems; Network-on-chip; Routing; System recovery; Ant colony optimization (ACO); fault-tolerant routing; network-on-chip (NoC);
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2014.2347922
  • Filename
    6926921