• DocumentCode
    1123995
  • Title

    Beyond Moore´s Law: the interconnect era

  • Author

    Meindl, J.D.

  • Author_Institution
    Microelectron. Res. Center, Georgia Inst. of Technol., Atlanta, GA, USA
  • Volume
    5
  • Issue
    1
  • fYear
    2003
  • Firstpage
    20
  • Lastpage
    24
  • Abstract
    Reversing early limitations on Moore\´s low, interconnectors have replaced transistors as the main determinants of chip performance. This "tyranny of interconnectors" will only escalate in the future, and thus the nanoelectronics that follow silicon must be interconnect-centric. This new technology will likely use "transistors" that approach, if not surpass, the 0.1 ps latency of 10 nm generation silicon transistors. Consequently, if we optimistically assume that the interconnects of this post-Moore\´s Law nanotechnology will be superconductive, their latency will exceed that of the transistors for interconnect lengths greater than 30 μm, while long, on-chip interconnect lengths will be 1,000 times greater at 30 mm. Consequently, mainstream electronics will have an interconnect era beyond Moore\´s law.
  • Keywords
    integrated circuit design; integrated circuit interconnections; nanoelectronics; superconducting interconnections; technological forecasting; 0.1 ps; 10 nm; 30 micron; 30 mm; IC interconnections; Moore´s law; chip performance determinants; interconnect-centric nanotechnology; on-chip interconnect lengths; superconductive interconnects; technological forecasting; transistor latency; Copper; Delay; Electron tubes; Energy dissipation; Integrated circuit interconnections; Logic devices; Moore´s Law; Silicon; Transistors; Wires;
  • fLanguage
    English
  • Journal_Title
    Computing in Science & Engineering
  • Publisher
    ieee
  • ISSN
    1521-9615
  • Type

    jour

  • DOI
    10.1109/MCISE.2003.1166548
  • Filename
    1166548