• DocumentCode
    1124017
  • Title

    On-chip high voltage charge pump in standard low voltage CMOS process

  • Author

    Hasan, T. ; Lehmann, T. ; Kwok, C.Y.

  • Author_Institution
    Dept of Eng., Univ. of Cambridge, UK
  • Volume
    41
  • Issue
    15
  • fYear
    2005
  • fDate
    7/21/2005 12:00:00 AM
  • Firstpage
    840
  • Lastpage
    842
  • Abstract
    An on-chip high voltage tolerant 4VDD charge pump with symmetrical architecture in a standard low voltage 1.8 V 0.18 μm CMOS process is presented. For a 250 kΩ load, circuit efficiency of the charge pump is approximately 71%. All the MOS transistors satisfy typical voltage stress related reliability requirements for standard low voltage CMOS devices.
  • Keywords
    CMOS integrated circuits; DC-DC power convertors; low-power electronics; 0.18 micron; 1.8 V; 250 kohm; 4VDD charge pump; CMOS devices; MOS transistors; low voltage CMOS process; on-chip high voltage charge pump; symmetrical architecture; voltage stress;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20051488
  • Filename
    1487738
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1124017