Aliasing Reduction in Accumulator-Based Response Verification

One of the well-known problems in response verification is aliasing, i.e., the event that a series of responses containing errors results in a signature equal to that of the error-free response sequence. In this paper, we propose a scheme to reduce aliasing in accumulator-based response verification. The proposed scheme is based on monitoring the value of the carry output of the accumulator. Experimental study indicates that the proposed scheme achieves significantly less hardware overhead for the same reduction in the aliasing probability than previously proposed schemes.