Title :
Scarce-state-transition error-trellis decoding of block codes with BPSK signals
Author :
Lee, L.H.C. ; Lee, L.W.
Author_Institution :
Sch. of Math., Phys., Comput. & Electron, Macquarie Univ., North Ryde, NSW
fDate :
7/7/1994 12:00:00 AM
Abstract :
A novel decoding technique for linear block codes with coherent BPSK signals is proposed. The new system has the same error performance as and similar complexity to the conventional trellis decoding of block codes. Like the scarce-state-transition Viterbi decoding of convolutional codes, the proposed system is also well suited for CMOS VLSI implementation and has a lower power consumption
Keywords :
CMOS integrated circuits; VLSI; block codes; decoding; error correction codes; phase shift keying; trellis codes; CMOS VLSI implementation; coherent BPSK signals; error performance; linear block codes; power consumption; scarce-state-transition error-trellis decoding;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19940803
