DocumentCode
1124516
Title
Scarce-state-transition error-trellis decoding of block codes with BPSK signals
Author
Lee, L.H.C. ; Lee, L.W.
Author_Institution
Sch. of Math., Phys., Comput. & Electron, Macquarie Univ., North Ryde, NSW
Volume
30
Issue
14
fYear
1994
fDate
7/7/1994 12:00:00 AM
Firstpage
1120
Lastpage
1121
Abstract
A novel decoding technique for linear block codes with coherent BPSK signals is proposed. The new system has the same error performance as and similar complexity to the conventional trellis decoding of block codes. Like the scarce-state-transition Viterbi decoding of convolutional codes, the proposed system is also well suited for CMOS VLSI implementation and has a lower power consumption
Keywords
CMOS integrated circuits; VLSI; block codes; decoding; error correction codes; phase shift keying; trellis codes; CMOS VLSI implementation; coherent BPSK signals; error performance; linear block codes; power consumption; scarce-state-transition error-trellis decoding;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19940803
Filename
299339
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