• DocumentCode
    1125001
  • Title

    Efficient FPGA Realization of CORDIC With Application to Robotic Exploration

  • Author

    Vachhani, Leena ; Sridharan, K. ; Meher, Pramod Kumar

  • Author_Institution
    Indian Inst. of Inf. Technol., Design & Manuf. Kancheepuram, Chennai, India
  • Volume
    56
  • Issue
    12
  • fYear
    2009
  • Firstpage
    4915
  • Lastpage
    4929
  • Abstract
    We present an area efficient method and field programmable gate array (FPGA) realization for two common operations in robotics, namely, the following: (1) rotating a vector in 2D and (2) aligning a vector in the plane with a specific axis. It is based on a new coordinate rotation digital computer (CORDIC) algorithm that is designed to work with a small set of elementary angles. Unlike conventional CORDIC, the proposed algorithm does not require a ROM and a full-fledged barrel shifter. The proposed CORDIC algorithm is used to design hardware efficient solutions for two mobile robotic tasks in an indoor environment without employing division and floating-point calculations. Experiments with a sole low end FPGA based robot in static as well as dynamic environments validate the power of the approach.
  • Keywords
    digital arithmetic; field programmable gate arrays; mobile robots; CORDIC FPGA realization; coordinate rotation digital computer algorithm; elementary angles set; field programmable gate array; hardware efficient solution; mobile robot; robotic exploration application; Area-efficient algorithm; coordinate rotation digital computer (CORDIC); field-programmable gate array (FPGA) implementation; robotic exploration;
  • fLanguage
    English
  • Journal_Title
    Industrial Electronics, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0046
  • Type

    jour

  • DOI
    10.1109/TIE.2009.2026225
  • Filename
    5153310