DocumentCode :
1125454
Title :
Optimal synthesis of multiple output Boolean functions using a set of quantum gates by symbolic reachability analysis
Author :
Hung, William N N ; Song, Xiaoyu ; Yang, Guowu ; Yang, Jin ; Perkowski, Marek
Author_Institution :
Synplicity Inc., Sunnyvale, CA
Volume :
25
Issue :
9
fYear :
2006
Firstpage :
1652
Lastpage :
1663
Abstract :
This paper proposes an approach to optimally synthesize quantum circuits by symbolic reachability analysis, where the primary inputs and outputs are basis binary and the internal signals can be nonbinary in a multiple-valued domain. The authors present an optimal synthesis method to minimize quantum cost and some speedup methods with nonoptimal quantum cost. The methods here are applicable to small reversible functions. Unlike previous works that use permutative reversible gates, a lower level library that includes nonpermutative quantum gates is used here. The proposed approach obtains the minimum cost quantum circuits for Miller gate, half adder, and full adder, which are better than previous results. This cost is minimum for any circuit using the set of quantum gates in this paper, where the control qubit of 2-qubit gates is always basis binary. In addition, the minimum quantum cost in the same manner for Fredkin, Peres, and Toffoli gates is proven. The method can also find the best conversion from an irreversible function to a reversible circuit as a byproduct of the generality of its formulation, thus synthesizing in principle arbitrary multi-output Boolean functions with quantum gate library. This paper constitutes the first successful experience of applying formal methods and satisfiability to quantum logic synthesis
Keywords :
Boolean functions; adders; logic design; multivalued logic; quantum gates; reachability analysis; Miller gate; formal verification; full adder; half adder; irreversible function; logic synthesis; model checking; multiple output Boolean functions; quantum circuits; quantum computing; quantum cost; quantum gate library; reversible logic; symbolic reachability analysis; Adders; Boolean functions; Circuit synthesis; Cost function; Logic circuits; Logic gates; Quantum computing; Reachability analysis; Signal synthesis; Software libraries; Formal verification; logic synthesis; model checking; quantum computing; reversible logic; satisfiability;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2005.858352
Filename :
1673740
Link To Document :
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