Title :
A class of multiprocessors for real-time image and multidimensional signal processing
Author :
Denayer, Tony ; Vanzieleghem, Etienne ; Jespers, Paul G A
Author_Institution :
Lab. de Microelectron., Univ. Catholique de Louvain, Louvain-la-Neuve, Belgium
fDate :
6/1/1988 12:00:00 AM
Abstract :
A 90000-transistor, 50-MIPS (million-instruction-per-second) multiprocessor chip designed for image orthogonal transform is discussed. The architectural principle, derived from a tensorial formalism, is usable for the other linear processings of multidimensional signals (e.g. n-dimensional convolution). A regularity factor of more than 99% was obtained by taking advantage of systolic principles at both chip and bit levels.<>
Keywords :
CMOS integrated circuits; VLSI; cellular arrays; computerised picture processing; multiprocessing systems; parallel architectures; 50 MIPS; architectural principle; bit levels; chip level; class of multiprocessors; image orthogonal transform; linear processings of multidimensional signals; multidimensional signal processing; multiprocessor chip; n-dimensional convolution; real-time image processing; regularity factor; systolic principles; tensorial formalism; Bandwidth; Circuits; Convolution; Digital TV; Discrete cosine transforms; Multidimensional signal processing; Signal design; Signal processing; Signal processing algorithms; Systolic arrays;
Journal_Title :
Solid-State Circuits, IEEE Journal of
