DocumentCode :
1127775
Title :
An industrial evaluation of DRAM tests
Author :
Van de Goor, Ad J.
Author_Institution :
Delft Univ. of Technol., Delft, Netherlands
Volume :
21
Issue :
5
fYear :
2004
Firstpage :
430
Lastpage :
440
Abstract :
DRAM production tests are currently necessary to reach a defect-per-million level that approaches the single-digit numbers. This implies that a single memory test is insufficient; rather, a set of tests is necessary. This application of 40 well-known memory tests to 1,896 1-Mbyte × 4 DRAM chips, used up to 48 different stress combinations with each test. The results show the importance of selecting the right stress combination, and that the theoretically better tests - those covering more different functional faults - also have higher fault coverage.
Keywords :
DRAM chips; fault diagnosis; logic testing; DRAM production tests; fault coverage; industrial evaluation; memory test; Decoding; Delay effects; Fault detection; Performance evaluation; Random access memory; Stress; Testing;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/MDT.2004.51
Filename :
1341382
Link To Document :
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