Title :
Testing and characterization of SDRAMs
Author :
Vollrath, Jöerg E.
Author_Institution :
Infineon Technol. AG, Munchen, Germany
Abstract :
To improve yield and product quality, SDRAM manufacturers perform a variety of tests. A test sequence that incorporates retention tests, signal margin tests, and speed tests can help manufacturers find and repair weak memory cells.
Keywords :
DRAM chips; integrated circuit testing; SDRAM testing; retention tests; signal margin tests; speed tests; test sequence; weak memory cell repair; Circuit testing; Clocks; Content addressable storage; Decoding; Delay; Manufacturing; SDRAM; Semiconductor device measurement; Signal processing; Timing;
Journal_Title :
Design & Test of Computers, IEEE
DOI :
10.1109/MDT.2003.1173052
