DocumentCode :
1129164
Title :
A framework for reconfigurable computing: task scheduling and context management-a summary
Author :
Maestre, Rafael ; Kurdahi, Fadi J. ; Fernandez, Milagros ; Hermida, Roman ; Bagherzadeh, Nader ; Singh, Hartej
Volume :
2
Issue :
4
fYear :
2002
Firstpage :
48
Lastpage :
51
Abstract :
Reconfigurable computing is consolidating itself as a real alternative to ASICs (Application Specific Integrated Circuits) and general-purpose processors. The main advantage of reconfigurable computing derives from its unique combination of broad applicability, provided by the reconfiguration capability, and achievable performance, through the potential parallelism exploitation. The key aspects of the scheduling problem in a reconfigurable architecture are discussed, focusing on a task scheduling methodology for DSP and multimedia applications, as well as the context management and scheduling optimizations.
Keywords :
VLSI; circuit CAD; digital signal processing chips; integrated circuit design; logic CAD; microprocessor chips; multimedia computing; processor scheduling; reconfigurable architectures; DSP applications; MorphoSys; compilation; computationally intensive applications; configuration management; context management; context transfers; data transfers; design process automation; digital signal processing applications; dynamically reconfigurable architectures; multimedia applications; task scheduling; Clocks; Computer architecture; Concurrent computing; Digital signal processing; Process control; Processor scheduling; Radio control; Random access memory; Reconfigurable architectures; Reduced instruction set computing;
fLanguage :
English
Journal_Title :
Circuits and Systems Magazine, IEEE
Publisher :
ieee
ISSN :
1531-636X
Type :
jour
DOI :
10.1109/MCAS.2002.1173134
Filename :
1173134
Link To Document :
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