• DocumentCode
    1131955
  • Title

    The J-K Gate

  • Author

    Oberman, R.M.M.

  • Author_Institution
    Department of Electrical Engineering, Technical University
  • Issue
    11
  • fYear
    1976
  • Firstpage
    1156
  • Lastpage
    1159
  • Abstract
    For many years two-input NAND, AND, NOR, OR and EX-OR gates have been commercially available as cheap quad TTL integrated circuits (IC´s). Ideas on quad programmable two-input gates (three inputs per gate) have been published in the literature but have not reached the commercial stage [1]. However, complicated and expensive arithmetic logic units (ALU´s) programmable to perform 16 different functions on two 4-bit arguments have become commercially available. The four sections of ALU´s are not individually programmable.
  • Keywords
    Digital circuit design, EX-OR gate, inverter, J-K gate, latch, logic circuit, NAND gate, NIMP gate, OR gate, programmable gate circuit, standard gate, zero/one-true/complement element.; Circuit simulation; Flip-flops; Master-slave; Propagation delay; Sequential circuits; Uncertainty; Digital circuit design, EX-OR gate, inverter, J-K gate, latch, logic circuit, NAND gate, NIMP gate, OR gate, programmable gate circuit, standard gate, zero/one-true/complement element.;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.1976.1674572
  • Filename
    1674572