Fully ECL-compatible GaAs standard-cell library

Author

Schou, Guy ; Cherel, Joel ; Perea, Ernesto H. ; Danckaert, Jean-Yves ; Dean, Thierry ; Chaplard, Jean

Author_Institution

Thomson Semicond., Orsay, France

Volume

23

Issue

3

fYear

1988

fDate

6/1/1988 12:00:00 AM

Firstpage

676

Lastpage

680

Abstract

A standard cell library for MSI circuits is described. It is based on buffered FET logic (BFL) with 1- mu m gate-length MESFET transistors. It contains gates, buffers, master-slave flip-flops, and ECL interfaces and it has been optimized to operate over the military temperature range. It is fully compatible with ECL circuits (signal level and power supply). Typical propagation delay is 80 ps for an inverter (FI=FO=1) and power dissipation is 5 mW per BFL cell. A realistic printed circuit board for test and demonstration is proposed.<>

Keywords

III-V semiconductors; Schottky gate field effect transistors; cellular arrays; emitter-coupled logic; field effect integrated circuits; gallium arsenide; integrated circuit technology; integrated logic circuits; printed circuits; 1 micron; 5 mW; 80 ps; BFL; ECL interfaces; ECL-compatible GaAs standard-cell library; GaAs; MESFET transistors; MSI circuits; buffered FET logic; buffers; compatible with ECL circuits; gates; master-slave flip-flops; military temperature range; power dissipation; printed circuit board for test; propagation delay; semiconductors; Circuit testing; FETs; Flip-flops; Gallium arsenide; Libraries; Logic; MESFETs; Master-slave; Power supplies; Temperature distribution;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.305

Filename

305