An Incremental Computer

Author

Brafmen ; Reuter, Benjamin J.

Author_Institution

Stanford Linear Accelerator, Stanford University

Issue

11

fYear

1977

Firstpage

1072

Lastpage

1081

Abstract

The article describes a variable high-speed incremental computer that adopts the basic concept underlying a digital differential analyzer (DDA). Its structure closely resembles that of a microprocessor and includes the following features: floating-point arithmetic, a word-length transfer with the elimination of a residue (R) register, multibit multiplication, and a flexible software scheme of interconnections that includes the use of a stack to avoid redundant operations. The proposed structure has been simulated by solving a variety of differential equations with distinctly accurate results.

Keywords

Common random-access memory for the microprocessor (COMEM), digital differential analyzer (DDA), Operation Code and microinstruction mnemonics, simulation to various high-order differential equations, variable high-speed Incremental Computer (IC).; Algorithms; Analog computers; Analytical models; Computational modeling; Differential equations; Floating-point arithmetic; Microprocessors; Nuclear and plasma sciences; Read-write memory; Registers; Common random-access memory for the microprocessor (COMEM), digital differential analyzer (DDA), Operation Code and microinstruction mnemonics, simulation to various high-order differential equations, variable high-speed Incremental Computer (IC).;

fLanguage

English

Journal_Title

Computers, IEEE Transactions on

Publisher

ieee

ISSN

0018-9340

Type

jour

DOI

10.1109/TC.1977.1674753

Filename

1674753