• DocumentCode
    1133727
  • Title

    General method for phase-locked loop filter analysis and design

  • Author

    Carlosena, A. ; Mànuel-Làzaro, A.

  • Author_Institution
    Dept. of Electr. & Electron. Eng., Univ. Publica de Navarra, Pamplona
  • Volume
    2
  • Issue
    2
  • fYear
    2008
  • fDate
    4/1/2008 12:00:00 AM
  • Firstpage
    249
  • Lastpage
    256
  • Abstract
    The analysis and design of high-order phase-locked loops (PLLs) is difficult. A novel approach is presented which allows high-order loops to be viewed as a natural extension of lower- order ones. Type I low-order PLLs are considered a starting point for the design of higher type, higher-order PLLs. Starting with lower-order PLLs not only permits a comprehensive classification of all practical kinds of PLLs but also facilitates their design from a more intuitive perspective. The model presented, based on the loop filter composed of several nested first-order feedback loops, has been implemented and tested in Simulinkreg, confirming the ideas presented.
  • Keywords
    feedback; filters; phase locked loops; Simulink; first-order feedback loops; high-order PLL; low-order PLL; phase-locked loop filter analysis; phase-locked loop filter design;
  • fLanguage
    English
  • Journal_Title
    Circuits, Devices & Systems, IET
  • Publisher
    iet
  • ISSN
    1751-858X
  • Type

    jour

  • DOI
    10.1049/iet-cds:20070065
  • Filename
    4490229