Author_Institution :
Dept. of Electr. Eng., Swiss Federal Inst. of Technol., Zurich, Switzerland
Abstract :
The development of incremental and decremental VT extractors based on the square-law characteristic and an n ×n2 transistor array is described. Different implementations have been discussed and the effect of nonidealities such as mobility reduction, channel-length modulation, mismatch, and body effect has been analyzed. Besides automatic VT extraction, parameter K of an MOS transistor can also be extracted automatically using the VT extractor, without any need of calculation and delay, and the extracted VT and K are, respectively, in voltage and current. Experimental results are presented and indicate that the differences between extracted values using the VT extractor and the most popular numerical method are as small as 0.15% and 0.064%. Additional applications, such as in level shifting, temperature compensation, and temperature measurement, where the VT extractor can be used either as a PTAT sensor or as a centigrade sensor, are presented
Keywords :
MOS integrated circuits; linear integrated circuits; MOS transistor array; PTAT sensor; automatic VT extraction; body effect; centigrade sensor; channel-length modulation; decremental extractor; incremental extractor; level shifting; mismatch; mobility reduction; square-law characteristic; temperature compensation; temperature measurement; threshold voltage extraction; Capacitance; Circuits; Delay; MOSFETs; Mirrors; Temperature dependence; Temperature measurement; Temperature sensors; Threshold voltage; Variable structure systems;
