Noise Analysis and Simulation Method for a Single-Slope ADC With CDS in a CMOS Image Sensor

Many mixed-signal circuits are nonlinear time-varying systems whose noise estimation cannot be obtained from the conventional frequency domain noise simulation (FNS). Although the transient noise simulation (TNS) supported by a commercial simulator takes into account nonlinear time-varying characteristics of the circuit, its simulation time is unacceptably long to obtain meaningful noise estimation results. Since the single-slope analog-to-digital converter with correlated double sampling (CDS/SS-ADC) in a CMOS image sensor (CIS) is composed of several operation phases in which the circuit topologies are different from each other, the noise cannot be estimated by the conventional FNS. This paper presents a noise estimation method for the CDS/SS-ADC that uses the FNS results while the transient noise behavior is taken into account. The proposed method provides noise estimation results closer to that of the TNS than the conventional FNS, whereas the simulation time is about the same as that of the FNS.