Abstract :
In this paper a method is developed for circuit minimization using the universal logic modules (ULM´s) of Yau and Tang. This objective is obtained by using an extension of prime implicants termed ULM implicants. Each ULM implicant implies one possible saving of a module in the tree structure implementing a function. The method is developed for the ULM(l) and an extension to the higher order ULM(p) is discussed.
Keywords :
Boolean algebra, integrated circuits, logic circuits, logic design, multiplexers, optimization, prime implicants, universal functions.; Algebra; Boolean functions; Design optimization; Integrated circuit yield; Logic circuits; Logic design; Logic functions; Minimization methods; Multiplexing; Tree data structures; Boolean algebra, integrated circuits, logic circuits, logic design, multiplexers, optimization, prime implicants, universal functions.;
