DocumentCode :
1134840
Title :
The Indirect Binary n-Cube Microprocessor Array
Author :
Pease, Marshall C., III
Author_Institution :
Information Science Laboratory of the. Information Science and Engineering Division, Stanford Research Institute
Issue :
5
fYear :
1977
fDate :
5/1/1977 12:00:00 AM
Firstpage :
458
Lastpage :
473
Abstract :
This paper explores the possibility of using a large-scale array of microprocessors as a computational facility for the execution of massive numerical computations with a high degree of parallelism. By microprocessor we mean a processor realized on one or a few semiconductor chips that include arithmetic and logical facilities and some memory. The current state of LSI technology makes this approach a feasible and attractive candidate for use in a macrocomputer facility.
Keywords :
Admissible maps, array processor, fast Fourier transform, grid computations, microprocessor array, n-cube array, parallel matrix multiplication, parallel processing, permutation network, switching network, triangular permutations, virtual array.; Arithmetic; Circuits; Computer networks; Concurrent computing; Grid computing; Large scale integration; Large-scale systems; Microprocessors; Parallel processing; Pins; Admissible maps, array processor, fast Fourier transform, grid computations, microprocessor array, n-cube array, parallel matrix multiplication, parallel processing, permutation network, switching network, triangular permutations, virtual array.;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.1977.1674863
Filename :
1674863
Link To Document :
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