DocumentCode :
1134897
Title :
Some Performance Issues in Multiprocessor System Design
Author :
Bhandarkar, Dileep P.
Author_Institution :
Texas Instruments, Inc.
Issue :
5
fYear :
1977
fDate :
5/1/1977 12:00:00 AM
Firstpage :
506
Lastpage :
511
Abstract :
Analytic and simulation models of memory interference have been reported in the literature. These models provide tools for analyzing various system architecture alternatives. Some of the design parameters are processor speed, memory speed, number of processors, number of memories, use of cache memories, high-order versus low-order interleaving, and memory allocation. This correspondence applies existing analytic and simulation models to the multiprocessor design space and presents guidelines for the multiprocessor system architect. Preferred design alternatives and tradeoffs are outlined.
Keywords :
Memory interference, memory interleaving, multiprocessors, performance.; Analytical models; Computer aided instruction; Computer networks; Costs; Degradation; Interference; Interleaved codes; Microcomputers; Multiprocessing systems; Process design; Memory interference, memory interleaving, multiprocessors, performance.;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.1977.1674868
Filename :
1674868
Link To Document :
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