DocumentCode :
1135261
Title :
FIRGEN: a computer-aided design system for high performance FIR filter integrated circuits
Author :
Jain, Rajeev ; Yang, Paul T. ; Yoshino, Toshiaki
Author_Institution :
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
Volume :
39
Issue :
7
fYear :
1991
fDate :
7/1/1991 12:00:00 AM
Firstpage :
1655
Lastpage :
1668
Abstract :
The authors describe automatic architecture and floorplan generation techniques for integrated circuit fixed-coefficient FIR (finite impulse response) filters that can achieve high sample rates with compact layouts. These techniques have been implemented in a filter design system called FIRGEN that can automate the entire design from filter specifications to final chip layout. It can be retargeted to new cell libraries and place and route tools. Result on four chips designed with FIRGEN are presented. These achieve sample rates ranging from 25 MHz to 112 MHz
Keywords :
circuit layout CAD; digital filters; monolithic integrated circuits; CAD system; FIRGEN; HF; VHF; automatic architecture generation; automatic floorplan generation; cell libraries; chip layout; compact layouts; filter design system; filter specifications; finite impulse response; fixed coefficient FIR filters; integrated circuits; place and route tools; sample rates; CMOS technology; Circuit simulation; Circuit synthesis; Design automation; Finite impulse response filter; IIR filters; Instruments; Integrated circuit layout; Software libraries; Telecommunications;
fLanguage :
English
Journal_Title :
Signal Processing, IEEE Transactions on
Publisher :
ieee
ISSN :
1053-587X
Type :
jour
DOI :
10.1109/78.134402
Filename :
134402
Link To Document :
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