Vertical-Si-Nanowire SONOS Memory for Ultrahigh-Density Application

In this letter, we present the fabrication and characteristics of a gate-all-around SONOS Flash memory using a vertical Si nanowire (SiNW), which is proposed to be the key building block to realize the 3-D multilevel memory technology for ultrahigh-density application. A highly scaled SiNW with a diameter down to 50 nm using CMOS-compatible technology was achieved. Using an unoptimized SONOS gate stack (with the thickness of SiO₂/Si₃N₄/SiO₂ ~ 5/5/6 nm), the devices exhibit well-behaved memory characteristics, in terms of program/erase window, retention, and endurance properties.