DocumentCode :
1135676
Title :
Defect-Oriented Testing of RF Circuits
Author :
Acar, Erkan ; Ozev, Sule
Author_Institution :
Duke Univ., Durham
Volume :
27
Issue :
5
fYear :
2008
fDate :
5/1/2008 12:00:00 AM
Firstpage :
920
Lastpage :
931
Abstract :
Radio-frequency (RF) test cost is soaring due to the increasing complexity of RF devices. Radically new test approaches that enable test time reduction while ensuring product quality are needed to reduce the overall product cost. In this paper, we present a test development methodology for RF circuits based on novel parametric, open-circuit, and short-circuit defect models. We inject parametric defects as deviations in physical circuit parameters, such as resistances, transistor widths, and lengths, and inject open- and short-circuit defects into the critical locations that are derived from the layout using inductive fault analysis. Despite fault injection, we consider a circuit unacceptable only if it violates any one of the performance specifications. Our test development method aims at reducing not only the number of measurements but also the overall test hardware cost by incorporating the relative setup cost of each measurement into our selection criteria. Experimental results on an RF front-end device show that our test methodology reduces the test time by 50% and the number of test setups by 17% while identifying all unacceptable circuit instances with a 99% failure coverage without any yield loss.
Keywords :
integrated circuit testing; radiofrequency integrated circuits; RF circuits; RF devices; RF front-end device; defect-oriented testing; inductive fault analysis; open-circuit defect models; physical circuit parameters; product cost reduction; product quality; radiofrequency test cost; short-circuit defect models; test time reduction; Circuit faults; Circuit simulation; Circuit testing; Costs; Failure analysis; Handheld computers; Hardware; Manufacturing; Radio frequency; Radiofrequency identification; Fault-based testing; RF domain fault models; RF testing; test cost reduction;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2008.917578
Filename :
4492825
Link To Document :
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