• DocumentCode
    1136342
  • Title

    Fault Detection Capabilities of Alternating Logic

  • Author

    Reynolds, Dennis A. ; Metze, Gernot

  • Author_Institution
    Sandia Laboratories
  • Issue
    12
  • fYear
    1978
  • Firstpage
    1093
  • Lastpage
    1098
  • Abstract
    This paper details the fault detection capability of a design technique named "alternating logic design." The technique achieves its fault detection capability by utilizing a redundancy in time instead of the conventional redundancy in space and is based on the successive execution of a required function and its dual. In combinational networks the method involves the utilization of a self-dual fumction to represent the required function and the realization of the self dual function in a network with structral properties which are sufficient to guarantee the detection of all single faults. One network structure with sufficient structral properties to detect all single stuck-line faults is the standard AND/OR or OR/AND two-level network [1]. However, other more general combinational logic structures also possess sufficient structural properties. Necessary and sufficient structural properties for any alternating network to be capable of detecting all single faults are derived.
  • Keywords
    Alternating logic; alternating systems; combinational network; on-line detection; single fault; stuck-at-faults; synchronous machine; time redundancy; totally self-checking; Circuit faults; Combinational circuits; Digital systems; Electrical fault detection; Fault detection; Feedback circuits; Logic design; Output feedback; Redundancy; Sequential circuits; Alternating logic; alternating systems; combinational network; on-line detection; single fault; stuck-at-faults; synchronous machine; time redundancy; totally self-checking;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.1978.1675011
  • Filename
    1675011