On the Characteristics of a Simple Architecture for Finite Impulse Response Digital Filtering

This correspondence discusses some useful features of a simple architecture for the hardware realization of finite impulse response (FIR) digital filters. The architecture is especially suited to applications where significant bandwidth reduction and subsampling (decimation) are required. The architecture is shown to be capable of both real signal filtering and combined complex frequency translation and low-pass filtering, although it contains no frequency synthesizer.