DocumentCode
1137025
Title
Design of Fail-Safe Sequential Machines Using Separable Codes
Author
Chuang, Henry Y.H. ; Das, Santanu
Author_Institution
Department of Computer Science, University of Pittsburgh
Issue
3
fYear
1978
fDate
3/1/1978 12:00:00 AM
Firstpage
249
Lastpage
252
Abstract
A method for realization of fail-safe sequential machines, using a class of separable codes called Berger codes in the state assignment, has been presented. The separability property is desirable in certain applications. Both on-set and off-set realizations are used for the next-state functions and this has the advantage over the methods using only on-set realization in that the checker is simpler. Realization of the output circuit is also considered.
Keywords
Berger code; fail-safe logic; monotone functions; separable code; state assignment; synchronous machine; Circuit faults; Clocks; Counting circuits; Design methodology; Logic design; Strontium; Synchronous machines; Berger code; fail-safe logic; monotone functions; separable code; state assignment; synchronous machine;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1978.1675078
Filename
1675078
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