DocumentCode :
113762
Title :
High efficient impedance matching circuit of power amplifier combined with antenna
Author :
Nakamura, Shigenari ; Pokharel, Ramesh K. ; Yoshida, Kenta ; Kanaya, Haruichi ; Kanemoto, Daisuke
Author_Institution :
Dept. Electron., Kyushu Univ., Fukuoka, Japan
fYear :
2014
fDate :
28-30 Aug. 2014
Firstpage :
84
Lastpage :
87
Abstract :
This paper describes the design of the power amplifier (PA) for 5GHz WLAN transmitter. In order to realize the high power added efficiency (PAE), impedance matching circuit is calculated by using the load-pull method. In this case, output impedance of the PA is different from 50 ohm. Our proposed 5 GHz class-A PA matched to the impedance of maximum PAE is designed. This PA has 9.82 dB of gain and 20.2 % of PAE which is 1.8 point larger than that of 50 ohm impedance matched PA. This PA is fabricated on the 0.18 um CMOS technology and measured the RF properties.
Keywords :
CMOS analogue integrated circuits; MMIC amplifiers; impedance matching; microwave antennas; microwave power amplifiers; radio transmitters; wireless LAN; CMOS technology; PA output impedance; RF properties; WLAN transmitter; class-A PA; efficiency 20.2 percent; frequency 5 GHz; gain 9.82 dB; high-efficient impedance matching circuit; load-pull method; maximum PAE impedance; power added efficiency; power amplifier design; resistance 50 ohm; size 0.18 mum; Antennas; CMOS integrated circuits; Impedance; Impedance matching; Power amplifiers; Radio frequency; Wireless LAN; WLAN; impedance matching circuit; power added efficience (PAE); power amplifier;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Wireless and Mobile, 2014 IEEE Asia Pacific Conference on
Conference_Location :
Bali
Print_ISBN :
978-1-4799-3710-3
Type :
conf
DOI :
10.1109/APWiMob.2014.6920283
Filename :
6920283
Link To Document :
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