DocumentCode :
1137633
Title :
Cost and performance analysis for mixed-signal system implementation: system-on-chip or system-on-package?
Author :
Shen, Meigen ; Zheng, Li-Rong ; Tenhunen, Hannu
Author_Institution :
Dept. of Microelectron. & Inf. Technol., R. Inst. of Technol., Kista-Stockholm, Sweden
Volume :
25
Issue :
4
fYear :
2002
fDate :
10/1/2002 12:00:00 AM
Firstpage :
262
Lastpage :
272
Abstract :
Advances in integrated circuits and packaging technologies provided us more implementation options for mixed-signal systems. Emerging technologies are represented by system-on-chip (SoC) and system-on-package (SoP). In order to make a design decision for optimal system implementation, it is hence becoming more and more important to address the cost and performance issues for various implementation options early in a system deign phase. In this paper, we develop a modeling technique for a priori cost and performance estimations for mixed-signal system implementations. The performance model evaluates various noise isolation technologies, such as using guard rings, increasing the separation between digital and analog/RF circuitry parts, using special substrate materials (e.g., silicon-on-insulator), and partitioning the system into several chips. In cost analysis, new factors such as extra chip area and additional process steps due to mixed signal isolation, integration of intellectual property (IP) right module or "virtual components," yield and technology compatibility for merging logic, memory and analog/RF circuits on a single chip, are considered. Finally, an efficient computation algorithm, namely COMSI, was developed for cost estimation under various mixed-signal performance constraints. Case studies for SoC and SoP integration are performed using COMSI.
Keywords :
VLSI; costing; equivalent circuits; integrated circuit economics; integrated circuit modelling; integrated circuit packaging; isolation technology; mixed analogue-digital integrated circuits; multichip modules; system-on-chip; COMSI computation algorithm; IP module; SoC; SoP; analog/RF circuitry; cost analysis; digital circuitry; figure-of-merit; guard rings; intellectual property module; mixed-signal performance constraints; mixed-signal system implementations; modeling technique; noise isolation technologies; optimal system implementation; packaging parasitics; performance analysis; performance model; quality factor; substrate coupling; system-on-chip; system-on-package; Circuit noise; Cost function; Integrated circuit packaging; Integrated circuit technology; Isolation technology; Performance analysis; Radio frequency; Signal analysis; Silicon on insulator technology; System-on-a-chip;
fLanguage :
English
Journal_Title :
Electronics Packaging Manufacturing, IEEE Transactions on
Publisher :
ieee
ISSN :
1521-334X
Type :
jour
DOI :
10.1109/TEPM.2002.807721
Filename :
1176908
Link To Document :
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