DocumentCode
1137745
Title
Binary Decision Diagrams
Author
Akers, Sheldon B.
Author_Institution
Electronics Laboratory, General Electric
Issue
6
fYear
1978
fDate
6/1/1978 12:00:00 AM
Firstpage
509
Lastpage
516
Abstract
This paper describes a method for defining, analyzing, testing, and implementing large digital functions by means of a binary decision diagram. This diagram provides a complete, concise, "implementation-free" description of the digital functions involved. Methods are described for deriving these diagrams and examples are given for a number of basic combinational and sequential devices. Techniques are then outlined for using the diagrams to analyze the functions involved, for test generation, and for obtaining various implementations. It is shown that the diagrams are especially suited for processing by a computer. Finally, methods are described for introducing inversion and for directly "interconnecting" diagrams to define still larger functions. An example of the carry look-ahead adder is included.
Keywords
Binary decision diagrams; digital functions; logic diagrams; logic synthesis; logical analysis; test generation; Adders; Boolean functions; Data structures; Equations; Logic testing; System testing; Binary decision diagrams; digital functions; logic diagrams; logic synthesis; logical analysis; test generation;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1978.1675141
Filename
1675141
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