DocumentCode :
1138175
Title :
A Synthesizing Method for Large Parallel Counters with a Network of Smaller Ones
Author :
Kobayashi, Hideaki ; Ohara, Hiroyoshi
Author_Institution :
Department of Electronics and Communication, School of Science and Engineering, Waseda University
Issue :
8
fYear :
1978
Firstpage :
753
Lastpage :
757
Abstract :
This correspondence introduces an extended method of parallel counting which enables small parallel counters to generate larger ones. It is an extension of the Method of Carry Showers by Foster and Stockton to a (u,v)-counter network. A (u,v) counter is a small parallel counter with u inputs and v outputs, u = 2v− 1. It is shown that the counter delay is proportional to the log of the number N of inputs and the total number of elements is approximated by N/(u-v).
Keywords :
Array logics; associative processors; carry-shower counters; digital counters; fast multipliers; multiple-input adders; parallel counters; parallel-counter networks; Adders; Circuit synthesis; Counting circuits; Delay; Logic devices; Network synthesis; Read only memory; Array logics; associative processors; carry-shower counters; digital counters; fast multipliers; multiple-input adders; parallel counters; parallel-counter networks;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.1978.1675184
Filename :
1675184
Link To Document :
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