DocumentCode
1138218
Title
Low-voltage analog IC design in CMOS technology
Author
Coban, Abdulkerim L. ; Allen, Phillip E. ; Shi, Xudong
Author_Institution
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
Volume
42
Issue
11
fYear
1995
fDate
11/1/1995 12:00:00 AM
Firstpage
955
Lastpage
958
Abstract
In this brief, various problems confronting analog designers due to low supply voltage requirements are investigated. Some of the limiting factors are determined, and new solutions for low voltage design are proposed and demonstrated in two different circuits, namely a linear four quadrant analog multiplier and a rail-to-rail constant-gm input stage. The circuits were fabricated in a p-well 2 μm CMOS process available through MOSIS
Keywords
CMOS analogue integrated circuits; analogue multipliers; integrated circuit design; 2 micron; MOSIS; analog ICs; linear four quadrant analog multiplier; low voltage design; p-well CMOS process; rail-to-rail constant-transconductance input stage; Analog circuits; Analog integrated circuits; Batteries; CMOS analog integrated circuits; CMOS integrated circuits; CMOS technology; Low voltage; MOSFET circuits; Power dissipation; Threshold voltage;
fLanguage
English
Journal_Title
Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on
Publisher
ieee
ISSN
1057-7122
Type
jour
DOI
10.1109/81.477206
Filename
477206
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