• DocumentCode
    1138801
  • Title

    CAMELEON: a process-tolerant symbolic layout system

  • Author

    Croes, Kris ; De Man, Hugo J. ; Six, Paul

  • Author_Institution
    IMEC Lab., Heverlee, Belgium
  • Volume
    23
  • Issue
    3
  • fYear
    1988
  • fDate
    6/1/1988 12:00:00 AM
  • Firstpage
    705
  • Lastpage
    713
  • Abstract
    CAMELEON is a symbolic layout system, suited for industrial designs, that delivers layouts that can be compared with (orthogonal) manual layouts. This is obtained by: (1) a technology description language (TDL) describing layout primitives and design rules, which allows the customization of the system to any technology; (2) the ability to handle complex primitives, like S- or L-shaped transistors, allowing dense packing of diffusion blocks; and (3) considering compaction as a basic operation in the creation of stick diagrams. The designer can control compaction and is provided with adequate feedback. The conditions to obtain automatic technology conversions are discussed. The compaction method is explained extensively, in particular the partitioning and the covering method, used to increase time performance. A fast circuit-extraction module makes the link to simulation and verification tools. Some basic electrical rules are also checked.<>
  • Keywords
    circuit layout CAD; field effect integrated circuits; integrated logic circuits; CAMELEON; L-shaped transistors; S-shaped transistors; automatic technology conversions; basic electrical rules; compaction; complex primitives; covering method; creation of stick diagrams; customization; dense packing of diffusion blocks; design rules; fast circuit-extraction module; industrial designs; layout primitives; partitioning; process-tolerant symbolic layout system; rule checking; simulation tools; technology description language; verification tools; Automatic control; Circuit simulation; Compaction; Design methodology; Error correction; Feedback; Laboratories; Manuals; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/4.309
  • Filename
    309