• DocumentCode
    1139258
  • Title

    The ETA 10 liquid-nitrogen-cooled supercomputer system

  • Author

    Carlson, Douglas M. ; Sullivan, Daniel C. ; Bach, Randall E. ; Resnick, David R.

  • Author_Institution
    ETA Syst. Inc., St. Paul, MN, USA
  • Volume
    36
  • Issue
    8
  • fYear
    1989
  • fDate
    8/1/1989 12:00:00 AM
  • Firstpage
    1404
  • Lastpage
    1413
  • Abstract
    A supercomputer using CMOS circuit technology operating at liquid-nitrogen temperatures is discussed. As many as 2000 packaged circuit chips of up to 20000 gates each operate at a temperature below 90 K (which approximately doubles the speed of the circuit chips). Extensive utilization of built-in self-test provides for device and interconnect testability from the wafer at the foundry to the central processor product immersed in nitrogen. The devices are packaged and interconnected with special attention to materials choices to assure reliability of the connection structures. Laboratory cryogenic cycling studies at the device and printed-circuit-board levels are reported. Heat-transfer experiments conducted to validate nucleate boiling peak heat-flux limits of ~12 W/cm2 in liquid nitrogen are described. A vacuum-jacketed cryostat vessel provides the central processor chips with their liquid-nitrogen environment and allows several thousand signal wires to connect to them with minimal heat leak. A closed-loop cryogenic refrigeration system that recondenses the gaseous nitrogen generated from the boiling heat transfer in the cryostat is described
  • Keywords
    CMOS integrated circuits; integrated logic circuits; low-temperature techniques; microprocessor chips; multiprocessing systems; packaging; 77 to 90 K; CMOS circuit technology; ETA 10 supercomputer; built-in self-test; central processor chips; closed-loop cryogenic refrigeration system; connection structures; cryogenic cycling; heat transfer; interconnect testability; liquid N2 cooling; logic chips; nucleate boiling peak heat-flux limits; packaged circuit chips; reliability; vacuum-jacketed cryostat vessel; Built-in self-test; CMOS technology; Circuit testing; Cryogenics; Integrated circuit interconnections; Nitrogen; Packaging; Supercomputers; Temperature; Time of arrival estimation;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.30952
  • Filename
    30952