• DocumentCode
    1139296
  • Title

    MOS flat-band capacitance method at low temperatures

  • Author

    Huang, Cheng-Liang ; Gildenblat, Gennady Sh

  • Author_Institution
    Center for Electron. & Mater. Processes, Pennsylvania State Univ., University Park, PA, USA
  • Volume
    36
  • Issue
    8
  • fYear
    1989
  • fDate
    8/1/1989 12:00:00 AM
  • Firstpage
    1434
  • Lastpage
    1439
  • Abstract
    The expression CFB=Cox×(εsi /LD)/[Cox+(εsi /LD)] (where LD is the Debye length), commonly used for the flatband capacitance of the MOS structure, is invalid in the temperature range below 100 K. Consequently, significant error may be encountered when the flatband capacitance method is used to extract the flatband voltage, V FB, which is of considerable interest for both the modeling and characterization of MOS devices. To extend this method to low-temperature CMOS applications one has to use a more general model that can be obtained by applying Fermi-Dirac statistics and taking into account the impurity freeze-out effect. It is shown that when the temperature dependence of VFB is extracted using this approach, the experimental data for n+ polysilicon gate MOS capacitors are in good agreement with a simple method
  • Keywords
    capacitance; low-temperature techniques; metal-insulator-semiconductor devices; metal-insulator-semiconductor structures; semiconductor device models; 40 to 100 K; CMOS applications; Debye length; Fermi-Dirac statistics; MOS devices; MOS structure; flat-band capacitance; flatband voltage; impurity freeze-out effect; low temperatures; modeling; n+ polysilicon gate MOS capacitors; temperature dependence; Capacitance; Data mining; Impurities; MOS capacitors; MOS devices; Semiconductor device modeling; Statistics; Temperature dependence; Temperature distribution; Voltage;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.30956
  • Filename
    30956