DocumentCode
1139376
Title
Interference in Multiprocessor Systems with Localized Memory Access Probabilities
Author
Sethi, A.S. ; Deo, Narsingh
Author_Institution
Computer Science Program, Indian Institute of Technology
Issue
2
fYear
1979
Firstpage
157
Lastpage
163
Abstract
Past studies of memory interference in multiprocessor systems have generally assumed that the references of each processor are uniformly distributed among the memory modules. In this paper we develop a model with local referencing, which reflects more closely the behavior of real-life programs. This model is analyzed using Markov chain techniques and expressions are derived for the multiprocessor performance. New expressions are also obtained for the performance in the traditional uniform reference model and are compared with other expressions-available in the literature. Results of a simulation study are given to show the accuracy of the expressions for both models.
Keywords
Markov chain models; memory interference; multiprocessors; performance evaluation; simulation; Analytical models; Computer science; Decoding; Interference; Multiprocessing systems; Performance analysis; Predictive models; Switches; System performance; Markov chain models; memory interference; multiprocessors; performance evaluation; simulation;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1979.1675307
Filename
1675307
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