Title :
Unified Design of Self-Checking and Fail-Safe Combinational Circuits and Sequential Machines
Author :
Diaz, M. ; Azema, P. ; Ayache, J.M.
Author_Institution :
Laboratoire d´´Automatique et d´´Analyse des Systemes
fDate :
3/1/1979 12:00:00 AM
Abstract :
This correspondence deals with a unification and extension of some previous work on self-checking (SC) and fail-safe (FS) systems.
Keywords :
Fail-safe combinational circuits; fail-safe sequential machines; k-out-of-n codes; on-set realization; self-checking combinational circuits; self-checking sequential machines; single and unidirectional faults; Built-in self-test; Circuit faults; Clocks; Combinational circuits; Design methodology; Electrical fault detection; Fault detection; Hardware; Fail-safe combinational circuits; fail-safe sequential machines; k-out-of-n codes; on-set realization; self-checking combinational circuits; self-checking sequential machines; single and unidirectional faults;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1979.1675338
