• DocumentCode
    1139726
  • Title

    Si-Nanowire Based Gate-All-Around Nonvolatile SONOS Memory Cell

  • Author

    Fu, J. ; Singh, N. ; Buddharaju, K.D. ; Teo, S.H.G. ; Shen, C. ; Jiang, Y. ; Zhu, C.X. ; Yu, M.B. ; Lo, G.Q. ; Balasubramanian, N. ; Kwong, D.L. ; Gnani, E. ; Baccarani, G.

  • Author_Institution
    Agency for Sci., Technol. & Res., Singapore
  • Volume
    29
  • Issue
    5
  • fYear
    2008
  • fDate
    5/1/2008 12:00:00 AM
  • Firstpage
    518
  • Lastpage
    521
  • Abstract
    This letter presents a high-speed silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory cell in gate-all-around Si-nanowire (NW) architecture, which is fabricated by using a top-down process technology. The NW cell exhibits faster program and erase (P/E) speed compared to the corresponding planar device; 1 mus for programming and 1 ms for erasing at VGS = plusmn11 V with a threshold voltage shift "DeltaVTH" of 2.6 V using the Fowler-Nordheim tunneling mechanism. At these P/E conditions, the planar device does not show appreciable change. The improvement is originated from: 1) increased electric field at the Si-SiO2 interface; 2) reduced effective tunnel barrier width; and 3) low electric field in the blocking oxide, as analyzed through simulation. In addition, good data retention makes the NW-based SONOS cell a potential candidate for future high-speed low-voltage NAND-type nonvolatile Flash memory applications.
  • Keywords
    flash memories; nanowires; random-access storage; tunnelling; Fowler-Nordheim tunneling; data retention; electric field; gate-all-around silicon nanowire; nonvolatile flash memory; planar device; silicon-oxide-nitride-oxide-silicon nonvolatile memory cell; top-down process technology; tunnel barrier; CMOS technology; Dielectric devices; Electrostatics; Laboratories; Microelectronics; Nonvolatile memory; SONOS devices; Silicon; Threshold voltage; Tunneling; Gate-all-around (GAA); nanowire (NW); nonvolatile memory (NVM); silicon–oxide–nitride–oxide–silicon (SONOS);
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2008.920267
  • Filename
    4494636