Title :
A CMOS analog multi-sinusoidal phase-locked-loop
Author :
Padmanabhan, Mukund ; Martin, Ken
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
fDate :
9/1/1994 12:00:00 AM
Abstract :
An analog CMOS IC is described that is capable of tracking and isolating the sinusoidal components of a two-sinusoidal input signal, though the algorithm can be easily generalized to deal with a larger number of input sinusoids. It is based on adapting the parameters of an IIR filter; the filter topology takes on the form of resonators in a feedback loop, and the adaptive algorithm moves these resonator frequencies until they are equal to the input frequencies, at which point, the isolated sinusoids are available at the resonator outputs. The adaptive filter features a minimal hardware complexity (to track l sinusoids, exactly l second order resonators are needed), and also gets around the convergence problems normally associated with IIR adaptive filters. This filter was implemented in the continuous-time domain using a Gm-C architecture, with the Gm being used to tune the resonator frequency. The chip was fabricated using a 2-μm digital CMOS process, with poly resistors, and metal1-metal2 capacitors. It was tested and shown to be fully functional, with a useful tracking range of ≈500-800 kHz around the initial frequency of each resonator
Keywords :
CMOS integrated circuits; adaptive filters; feedback; linear integrated circuits; phase-locked loops; resonators; 2 micron; 500 to 800 kHz; Gm-C architecture; IIR filter; adaptive algorithm; adaptive filter; analog CMOS IC; continuous-time domain; feedback loop; multi-sinusoidal PLL; phase-locked-loop; poly resistors; resonator frequencies; resonators; two-sinusoidal input signal; Adaptive filters; Analog integrated circuits; CMOS analog integrated circuits; CMOS integrated circuits; Feedback loop; IIR filters; Phase locked loops; Resonant frequency; Resonator filters; Topology;
Journal_Title :
Solid-State Circuits, IEEE Journal of