DocumentCode
1140042
Title
Hardware Algorithms for Nonnumeric Computation
Author
Mukhopadhyay, Amar
Author_Institution
Department of Computer Science, University of Iowa
Issue
6
fYear
1979
fDate
6/1/1979 12:00:00 AM
Firstpage
384
Lastpage
394
Abstract
This paper is concerned with the design of hardware algorithms for nonnumeric computation. The subset of nonnumeric operations considered is derived from string processing languages such as Snobol or high-level database languages used in database management architectures. Being uniformly structured, the hardware could be implemented using LSI technology yielding an estimated pattern matching rate of about 100 million characters/s. The proposed nonnumeric processor will find applications in the environment of parallel (or associative) database management architectures, processing of large unstructured textual files, as a stand-alone microprocessor in digital communications which need simple search and update operations, or as a nonnumeric CPU that can be used along with the conventional CPU to expedite string processing operations.
Keywords
Database management architecture; Snobol; hardware algorithm; nonnumeric architecture; nonnumeric computation; parallel computation; text retrieval; Algorithm design and analysis; Communication system operations and management; Computer architecture; Database languages; Environmental management; Hardware; Large scale integration; Microprocessors; Pattern matching; Yield estimation; Database management architecture; Snobol; hardware algorithm; nonnumeric architecture; nonnumeric computation; parallel computation; text retrieval;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1979.1675378
Filename
1675378
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